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[VHDL-FPGA-Verilog] Altera_uart_VHDL

Description: FPGA/CPLD应用,uart通讯VHDL原码.-FPGA/CPLD applications, UART communications VHDL source.
Platform: | Size: 10240 | Author: cyberworm | Hits:

[VHDL-FPGA-Verilog] uartvhdl

Description: 一个在FPGA芯片上实现UART功能的vhdl源代码，提供了UART的集成-an FPGA chip to achieve UART function vhdl source code, providing integrated UART
Platform: | Size: 10240 | Author: 王利 | Hits:

[VHDL-FPGA-Verilog] uart_vhdl_lattice

Description: UART的rs232通信接口VHDL语言，里面有详细的介绍-UART communication interface rs232 VHDL language, which is described in detail
Platform: | Size: 108544 | Author: 拉拉 | Hits:

[VHDL-FPGA-Verilog] Uart2

Description: uart的VHDL源代码，包括intface.VHD UART_RX_TAB.VHD UART_INT_TB.VHD等-uart VHDL source code, including intface.VHD UART_RX_TAB.VHD UART_INT_TB. Volume etc.
Platform: | Size: 43008 | Author: 罗辉 | Hits:

[VHDL-FPGA-Verilog] uart_core_vhdlORverilog

Description: 串uart的vhdl，verilog，lattic实现原码 里面有四个文件,分别UART 源码 (lattice version)\uart 源码 (Verilog)\uart 源码 (VHDL)\uart16550.tar-uart series of vhdl and verilog. lattic achieve the original code, there are four documents, Source respectively UART (lattice version) \ uart source (Verilog) \ uart source (VHDL) \ uart16550.tar
Platform: | Size: 294912 | Author: efly | Hits:

[MPI] uartdesign

Description: 完成VHDL实现UART准确无误码传输.-UART realize the accuracy of the completion of VHDL code transmission.
Platform: | Size: 4096 | Author: bingyu | Hits:

[VHDL-FPGA-Verilog] VHDL_to_UART

Description: 用VHDL编写的串口通讯程序，包括几个不同的程序例子，也可以用verilog进行改写。
Platform: | Size: 3072 | Author: 汪毅 | Hits:

[VHDL-FPGA-Verilog] vhdl0716

Description: ISE7.1，采用VIRTEX-II芯片。实现adc数据采样，平均，通道选择，采样时钟选择，数据格式调整，内含fifo,uart等模块。-ISE7.1, using VIRTEX-II chip. Adc realize data sampling, on average, channel selection, the sampling clock select, adjust data formats, including fifo, uart modules.
Platform: | Size: 8431616 | Author: 杨奋燕 | Hits:

[VHDL-FPGA-Verilog] uart1

Description: 串口程序，基于VHDL 的，很好的程序 快下吧-Serial procedures, based on VHDL, and a very good program, are you fast
Platform: | Size: 577536 | Author: 张俊 | Hits:

[VHDL-FPGA-Verilog] FPGA+DSS+UART

Description: 用FPGA实现任意波形发生器的源代码，另外还包括FPGA实现UART，从而与MCU实现串行通信。-Using FPGA to achieve arbitrary waveform generator of the source code, including the FPGA also realize UART, in order to realize serial communication with the MCU.
Platform: | Size: 2048 | Author: zhuangxb | Hits:

[VHDL-FPGA-Verilog] uartsourcecode

Description: uart的FPGA模块，基于VHDL、verilog语言-the FPGA UART modules, based on VHDL, verilog language
Platform: | Size: 293888 | Author: 王辉 | Hits:

[VHDL-FPGA-Verilog] UART232

Description: 本代码是用VHDL语言全面、系统地描述UART通信协议标准，通过对UART进行数据通信的实际运用，能够较全面地理解和掌握VHDL和UART协议。-The VHDL language code is a comprehensive, systematic description of UART communication protocol standards, through the UART to the practical application of data communications, to more fully understand and grasp the VHDL and the UART protocol.
Platform: | Size: 22528 | Author: fengxinya | Hits:

[VHDL-FPGA-Verilog] VHDLserial

Description: UART参考设计带缓存用于Xinlix用于FPGA-UART reference design with cache for Xinlix for FPGA
Platform: | Size: 279552 | Author: sd | Hits:

[VHDL-FPGA-Verilog] uart_vhdl

Description: vhdl的异步串口代码，可以方便以致在不同的FPGA中-asynchronous serial VHDL code, can easily result in different FPGA in
Platform: | Size: 18432 | Author: 李冰 | Hits:

[Software Engineering] FPGAUART

Description: 用VHDl设计UART的文章，使用QuartusII平台-Design with VHDL UART article, use QuartusII platform
Platform: | Size: 136192 | Author: 胡玉贵 | Hits:

[VHDL-FPGA-Verilog] uart_for_MCU

Description: 用VHDL为MCU编写的可用UART-通用异步收发器程序-Using VHDL for the MCU can be used to prepare the UART-Universal Asynchronous Receiver Transmitter procedures
Platform: | Size: 1024 | Author: pc repair | Hits:

[VHDL-FPGA-Verilog] uart.core.for.FPGA

Description: 一个UART的FPGA core，附有详细的代码阅读笔记-A UART of the FPGA core, accompanied by a detailed code of reading notes
Platform: | Size: 614400 | Author: 获得 | Hits:

[VHDL-FPGA-Verilog] UART_VHDL

Description: URAT异步通信接口的VHDL描述，可综合-URAT asynchronous communication interface VHDL description can be integrated
Platform: | Size: 667648 | Author: luyingc | Hits:

[Com Port] uart

Description: this a Uart source code using Verilog.
Platform: | Size: 10240 | Author: Daniel Zhang | Hits:

[Com Port] UARTchuli

Description: UART 处理的是并行数据转换为串行信号和串行信号转换为并行数据。现有的时钟不精确,这就需要用一个远高于波特率的本地时钟信号对输入信号不断采样,以不断让接收器与发送器保持同步。-UART to handle is the parallel data into a serial signal and serial signal is converted to parallel data. Existing imprecise clock, which requires a much higher than the baud rate of the local clock signal for sampling the input signal continuously to continuously allow the receiver to maintain synchronization with the transmitter.
Platform: | Size: 1024 | Author: xuye | Hits:
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